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HI-200/883
Data Sheet January 30, 2006 FN6059.2
Dual SPST CMOS Analog Switch
The HI-200/883 is a monolithic device comprising two independently selectable SPST switchers which feature fast switching speeds (240ns typical) combined with low power dissipation (15mW typical @ +25C). Each switch provides low "ON" resistance operation for input signal voltages up to the supply rails and for signal currents up to 25mA continuous. Rugged DI construction eliminates latch-up and substrate SCR failure modes. All devices provide break-before-make switching and are TTL and CMOS compatible for maximum application versatility. HI-200/883 is an ideal component for use in high frequency analog switching. Typical applications include signal path switching, sample and hold circuits, digital filters, and op amp gain switching networks.
Features
* This Circuit is Processed in Accordance to MIL-STD-883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. * Low "On" Release . . . . . . . . . . . . . . . . . . . . . . .100 Max * Wide Analog Signal Range . . . . . . . . . . . . . . . . . . . .15V * TTL/CMOS Compatible . . . . . . . . . . . . . . 2.4V (Logic "1") * Turn-On Time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns * Analog Current Range (Continuous) . . . . . . . . . . . . 25mA * No Latch-Up * Replaces DG200
Applications
* High Frequency Analog Switching * Sample and Hold Circuits * Digital Filters
Functional Diagram
V+ VREF INPUT SOURCE
www..com
* Op Amp Gain Switching Networks
LOGIC INPUT
GATE REFERENCE, LEVEL SHIFTER, AND DRIVER
SWITCH CELL
GATE
Ordering Information
PART NUMBER
OUTPUT
DRAIN
TEMP. RANGE (C) -55 to 125
PACKAGE 10 Pin Metal Can
PKG. DWG. # T10.B
HI2-0200/883
V-
Pinout
HI2-200/883 (METAL CAN) TOP VIEW
V+ 10 A1 A2 2 1 9 IN1 8 7 4 5 OUT2 6 VOUT1 VREF
GND 3 IN2
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2004, 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
HI-200/883
Absolute Maximum Ratings
Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . .40V VSUPPLY to Ground (V+, V-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V Analog Input Voltage, (+VS ) . . . . . . . . . . . . . . . . . . +VSUPPLY +2V Analog Input Voltage, (-VS ) . . . . . . . . . . . . . . . . . . . . -VSUPPLY -2V Digital Input Voltage, (+VA) . . . . . . . . . . . . . . . . . . . +VSUPPLY +4V Digital Input Voltage, (-VA). . . . . . . . . . . . . . . . . . . . . -VSUPPLY -4V Peak Current (S or D) (Pulse at 1ms, 10% Duty Cycle Max). . . . . . . . . . . . . . . . . . 40mA Continuous Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65C to +150C Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . . . 275C
Thermal Information
Thermal Resistance JA (C/W) JC (C/W) Metal Can Package . . . . . . . . . . . . . . . 160 75 Package Power Dissipation at +75C Metal Can Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.62W/C Package Power Dissipation Derating Factor above +75C Metal Can Package . . . . . . . . . . . . . . . . . . . . . . . . . . .8.24mW/C
Recommended Operating Conditions
Operating Temperature Range . . . . . . . . . . . . . . . .-55C to +125C Operating Supply Voltage Range (VSUPPLY) . . . . . . . . . . . . . . 15V Analog Input Voltage (VS) . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY Logic Low Level (VAL) . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 0.8V Logic High Level (VAH) . . . . . . . . . . . . . . . . . . . . 2.4V to +VSUPPLY
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
TABLE 1. D.C. ELECTRICAL PERFORMANCE SPECIFICATIONS Device Tested at: +VSUPPLY = +15V, -VSUPPLY = -15V, VREF = OPEN, GND = 0V, Unless Otherwise Specified. D.C. PARAMETERS Switch "ON" Resistance SYMBOL rDS CONDITIONS VA = 0.8V, VS = 10V, ID = -1mA, All Unused Channels VA = 0.8V VA = 0.8V, VS = -10V, ID = 1mA, All Unused Channels VA = 0.8V Source "OFF" Leakage Current IS(OFF) VS = +14V, VD = -14V, VA = 2.4V, All Unused Channels VA = 2.4V, VD = +14V, VS = -14V VS = -14V, VD = +14V, VA = 2.4V, All Unused Channels VA = 2.4V, VD = -14V, VS = +14V Drain "OFF" Leakage Current ID(OFF) VD = -14V, VS = +14V, VA = 2.4V, All Unused Channels VA = 2.4V, VD = +14V, VS = -14V VD = +14V, VS = -14V, VA = 2.4V, All Unused Channels VA = 2.4V, VD = -14V, VS = +14V Channel "ON" Leakage Current ID(ON) VD = VS = +14V, VA = 0.8V, All Unused Channels VA = 0.8V, VD = VS = -14V VD = VS = -14V, VA = 0.8V, All Unused Channels VA = 0.8V, VD = VS = +14V Low Level Input Current High Level Input Current Supply Current IAL VAL = 0.8V All Channels VA = 2.4V VAH = 2.4V All Channels VAH = 4.0V All Channels VA = 0V GROUP A SUBGROUPS 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 All Channels VA = 3V 1 2, 3 TEMPERATURE (C) 25 -55 to 125 25 -55 to 125 25 -55 to 125 25 -55 to 125 25 -55 to 125 25 -55 to 125 25 -55 to 125 25 -55 to 125 25 -55 to 125 25 -55 to 125 25 -55 to 125 25 -55 to 125 MIN -5 -500 -5 -500 -5 -500 -5 -500 -5 -500 -5 -500 -1.0 -1.0 -1.0 -1.0 MAX 70 100 70 100 5 500 5 500 5 500 5 500 5 500 5 500 1.0 1.0 1.0 1.0 2.0 2.0 2.0 2.0 UNITS nA nA nA nA nA nA nA nA nA nA nA nA A A A A A A mA mA
IAH
+ICC
2
FN6059.2 January 30, 2006
HI-200/883
TABLE 1. D.C. ELECTRICAL PERFORMANCE SPECIFICATIONS (Continued) Device Tested at: +VSUPPLY = +15V, -VSUPPLY = -15V, VREF = OPEN, GND = 0V, Unless Otherwise Specified. D.C. PARAMETERS Supply Current SYMBOL -ICC CONDITIONS All Channels VA = 0V GROUP A SUBGROUPS 1 2, 3 All Channels VA = 3V 1 2, 3 TEMPERATURE (C) 25 -55 to 125 25 -55 to 125 MIN -2.0 -2.0 -2.0 -2.0 MAX UNITS A A A A
TABLE 2. A.C. ELECTRICAL PERFORMANCE SPECIFICATIONS Device Tested at: +VSUPPLY = +15V, -VSUPPLY = -15V, VREF = OPEN, GND = 0V, Unless Otherwise Specified. GROUP A SUBGROUPS 9 10, 11 9 10, 11 TEMPERATURE (C) 25 55 to 125 25 55 to 125
PARAMETERS Turn "ON" Time
SYMBOL tON
CONDITIONS CL = 35pF, RL = 1k CL = 33pF, RL = 1k
MIN -
MAX 500 800 500 650
UNITS ns ns ns ns
Turn "OFF" Time
tOFF
TABLE 3. ELECTRICAL PERFORMANCE SPECIFICATIONS (NOTE 1) Device Tested at: +VSUPPLY = +15V, -VSUPPLY = -15V, VREF = OPEN, GND = 0V PARAMETERS Address Capacitance Switches Input Capacitance Switch Output Capacitance SYMBOL CA CS (OFF) CD (OFF) CD (ON) Drain to Source Capacitance Off Isolation Cross Talk Charge Transfer Error NOTE: 1. Parameters listed in Table 2 are controlled via design or process parameters and are not directly tested at final production. These parameters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization based upon data from multiple production runs which reflect lot to lot and within lot variation. TABLE 4. ELECTRICAL TEST REQUIREMENTS MIL-STD-883 TEST REQUIREMENTS Interim Electrical Parameters (Pre Burn-in) Final Electrical Test Parameters Group A Test Requirements Groups C & D Endpoints NOTE: 2. PDA applies to Subgroup 1 only. SUBGROUPS (Tables 1 and 2) 1 1 (Note 2), 2, 3, 9, 10, 11 1, 2, 3, 9, 10, 11 1 CDS VISO VCT VCTE CONDITIONS f = 1MHz, VAL = 0V f = 1MHz, VAH = 5V, Measured Source to GND f = 1MHz, VAH = 5V, Measured Output to Ground f = 1MHz, VAL = 0V, Measured Output to Ground f = 1MHz, VAH = 5V f = 200kHz, VA = 2.4, RL = 1K, VGEN = 1VP-P, CL = 10pF f = 200kHz, VA = 2.4, RL = 1K, VGEN = 1VP-P, CL = 10pF f = 200kHz, VA = 0 to 4V, CL = 0.01F NOTE 1 1 1 1 1 1 1 1 TEMPERATURE (C) 25 25 25 25 25 25 25 25 MIN 55 60 -10 MAX 20 20 20 30 2.0 10 UNITS pF pF pF pF pF dB dB mV
3
FN6059.2 January 30, 2006
HI-200/883 Test Circuits
+VCC S
+VCC D ID
S VIN IIN
D
VS
VD
VIN
GND
-VCC
GND
-VCC
FIGURE 1. INPUT LEAKAGE CURRENT
FIGURE 2. ID (OFF)
+VCC VS S IS VD VIN
+VCC S D ID(ON)
VIN
V
GND
-VCC
GND
-VCC
FIGURE 3. IS (OFF)
FIGURE 4. ID (ON)
+VCC
I1 15V S D STEP GENERATOR IN1 V+ IN3 S1 VIN TEST POINT 0.01F TEST POINT 0.01F D1 IN2 S2 GND I2 D2 VS3 D3 IN4 S4 D4 GND TEST POINT 0.01F TEST POINT 0.01F STEP GENERATOR (SEE NOTE)
-15V GND -VCC
FIGURE 5. SUPPLY CURRENTS
FIGURE 6. CHARGE TRANSFER ERROR
4
FN6059.2 January 30, 2006
HI-200/883 Test Circuits
(Continued)
15V +VCC SINE WAVE GENERATOR D TEST POINT VIN VD 1k 2.4V 24V IN1 V+ IN3 S1 D1 IN2 S2 TEST POINT D2 VS3 D3 IN4 S4 D4 GND TEST POINT 1k 2.4V TEST POINT SINE WAVE GENERATOR
S
1k
1k
GND
-VCC
-15V GND
FIGURE 7. RDS
FIGURE 8. OFF CHANNEL ISOLATION
24V 0.8V TEST POINT 1k TEST POINT 1k 24V 0.8V
15V IN1 V+ IN3 S1 D1 IN2 S2 D2 VS3 D3 IN4 S4 D4 GND
24V 0.8V
1k
TEST POINT 24V 0.8V 1k TEST POINT 1k STEP GENERATOR
-15V GND
FIGURE 9. CROSSTALK BETWEEN CHANNELS
5
FN6059.2 January 30, 2006
HI-200/883 Switching Waveforms
FIGURE 10.
FIGURE 11.
6
FN6059.2 January 30, 2006
HI-200/883 Burn-In Circuit
FIGURE 12. HI-200/883 METAL CAN (TO-99) NOTES:
3. R1 = R2 = 10k 4. C1 = C2 = 0.01F (per socket) or 0.1F (per row) 5. D1 = D2 = IN4002 or equivalent
6. |(V+) - (V-)| = 30V
Schematic Diagrams
TTL/CMOS REFERENCE CIRCUIT VREF CELL
V+ R6 300 QP2 QP1 QP4 QN1 D3 R3 24.2K QN2 R4 5.4K R5 7.9K MN15 VGND MN16 MN17 R7 100K MN14 QP3 QN4 MP13 QP5 TO P2 VREF
R2 5K
VLL
GND
7
FN6059.2 January 30, 2006
HI-200/883 Schematic Diagrams
(Continued) SWITCH CELL
A' N11
V+
N12
INPUT
P11
N13
OUTPUT
V-
P12
A'
DIGITAL INPUT BUFFER AND LEVEL SHIFTER
V+ P3 P1 P4 N11 N12 INPUT N8 N6 P2 VA VN2 N5
P12
P5
V+
N1 P6 TO VLL P7 P8 P9 P10 P11
D1 R1 200 TO VREF D2
N13
OUTPUT
N9
N10
N7
N4 N3
VV-
8
FN6059.2 January 30, 2006
HI-200/883 Test Circuits and Waveforms
80 70 ON RESISTANCE () VIN = 0V ON RESISTANCE () 60 50 40 30 20 10 0 -50 -25 0 25 50 75 100 125 TEMPERATURE (C) 0 -15
TA = 25C, VSUPPLY = 15V, VAH = 2.4V, VAL = 0.8V and VREF = Open
100 V+ = +10V V- = -10V V+ = +12.5V V- = -12.5V 50 V+ = +15V V- = -15V
-10
-5 0 5 ANALOG SIGNAL LEVEL (V)
10
15
FIGURE 13. ON RESISTANCE vs TEMPERATURE
FIGURE 14. ON RESISTANCE vs ANALOG SIGNAL LEVEL AND POWER SUPPLY VOLTAGE
100
90 80 SWITCH CURRENT (mA) IS(OFF)/ID(OFF) 70 60 50 40 30 20 10
CURRENT (nA)
10
ID(ON) 1.0
0.1 25 50 75 100 125 TEMPERATURE (C)
0 0 1 2 3 4 5 6 7 VOLTAGE ACROSS SWITCH (V)
FIGURE 15. LEAKAGE CURRENT vs TEMPERATURE
FIGURE 16. SWITCH CURRENT vs VOLTAGE
140 120 OFF ISOLATION (dB) 100 80 60 40 20 0 100Hz RL = 1k
1kHz
10kHz FREQUENCY (Hz)
100kHz
1MHz
FIGURE 17. OFF ISOLATION vs FREQUENCY
9
FN6059.2 January 30, 2006
HI-200/883 Die Characteristics
DIE ATTACH: Material: Gold/Silicon Eutectic Alloy Temperature: Metal Can - 420C (Max)
Metallization Mask Layout
HI-200
GND A2 A1 V+
2
1
10
9
IN 2
3
8
IN 1
OUT 2
4
5
V-
6
VREF
7
OUT 1
10
FN6059.2 January 30, 2006
HI-200/883 Metal Can Packages (Can)
REFERENCE PLANE A L L2 L1 A A OD OD1 Oe 2 1 Ob1 F Q Ob BASE AND SEATING PLANE BASE METAL LEAD FINISH N k1 OD2
T10.B MIL-STD-1835 MACY1-X10 (A2)
e1 10 LEAD METAL CAN PACKAGE INCHES SYMBOL A Ob Ob1 Ob2 OD MIN 0.165 0.016 0.016 0.016 0.335 0.305 0.110 MAX 0.185 0.019 0.021 0.024 0.375 0.335 0.160 MILLIMETERS MIN 4.19 0.41 0.41 0.41 8.51 7.75 2.79 MAX 4.70 0.48 0.53 0.61 9.52 8.51 4.06 NOTES 1 1 2 1 1 1 3 3 4 Rev. 0 5/18/94
k
OD1
C L
OD2 e e1 F k k1
0.230 BSC 0.115 BSC 0.027 0.027 0.500 0.250 0.010 36o BSC 36o BSC 10 0.040 0.034 0.045 0.750 0.050 0.045 -
5.84 BSC 2.92 BSC 1.02 0.86 1.14 19.05 1.27 1.14
0.69 0.69 12.70 6.35 0.25
Ob1
Ob2
L L1
SECTION A-A
L2 Q
NOTES: 1. (All leads) Ob applies between L1 and L2. Ob1 applies between L2 and 0.500 from the reference plane. Diameter is uncontrolled in L1 and beyond 0.500 from the reference plane. 2. Measured from maximum diameter of the product. 3. is the basic spacing from the centerline of the tab to terminal 1 and is the basic spacing of each lead or lead position (N -1 places) from , looking at the bottom of the package. 4. N is the maximum number of terminal positions. 5. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 6. Controlling dimension: INCH.
N
36o BSC 36o BSC 10
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 11
FN6059.2 January 30, 2006


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